From 47629f676518f1808dc98c5740a31d8d23c940c7 Mon Sep 17 00:00:00 2001 From: Younian Wang Date: Wed, 24 Jan 2018 19:48:24 +0800 Subject: [PATCH] clk: hi3798cv200: correct IR clock parent The IR clock is sourced from '24m' rather than '100m'. Correct it. Signed-off-by: Younian Wang Signed-off-by: Shawn Guo --- drivers/clk/hisilicon/crg-hi3798cv200.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/hisilicon/crg-hi3798cv200.c b/drivers/clk/hisilicon/crg-hi3798cv200.c index c586c79f4623..d7d1ba0153ec 100644 --- a/drivers/clk/hisilicon/crg-hi3798cv200.c +++ b/drivers/clk/hisilicon/crg-hi3798cv200.c @@ -244,7 +244,7 @@ static const struct hisi_crg_funcs hi3798cv200_crg_funcs = { #define HI3798CV200_SYSCTRL_NR_CLKS 16 static const struct hisi_gate_clock hi3798cv200_sysctrl_gate_clks[] = { - { HISTB_IR_CLK, "clk_ir", "100m", + { HISTB_IR_CLK, "clk_ir", "24m", CLK_SET_RATE_PARENT, 0x48, 4, 0, }, { HISTB_TIMER01_CLK, "clk_timer01", "24m", CLK_SET_RATE_PARENT, 0x48, 6, 0, }, -- 2.30.2