From 5b695aff3af5606c4128eba6a64c33c7d74d4f49 Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Date: Tue, 30 Jan 2018 11:49:12 -0200 Subject: [PATCH] drm/i915/icl: Fail flip if ddb allocated are less than min display buffer needed ICL require DDB allocation of plane to be more than "minimum display buffer needed" for each level in order to enable WM level. This patch implements and consider the same while allocating DDB and enabling WM. Changes Since V1: - rebase Changes Since V2: - Remove extra parentheses - Use FP16.16 only when absolutely necessary (Paulo) Changes Since V3: - Rebase Changes since v4 (from Paulo): - Coding style issue. Changes since v5 (from Paulo): - Do the final checks according to BSpec. Reviewed-by: Paulo Zanoni Signed-off-by: Mahesh Kumar Signed-off-by: Paulo Zanoni Link: https://patchwork.freedesktop.org/patch/msgid/20180130134918.32283-4-paulo.r.zanoni@intel.com --- drivers/gpu/drm/i915/intel_pm.c | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 985642cf1c9a..24421603e605 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4507,6 +4507,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, struct intel_atomic_state *state = to_intel_atomic_state(cstate->base.state); bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state); + uint32_t min_disp_buf_needed; if (latency == 0 || !intel_wm_plane_visible(cstate, intel_pstate)) { @@ -4565,7 +4566,31 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, } } - if (res_blocks >= ddb_allocation || res_lines > 31) { + if (INTEL_GEN(dev_priv) >= 11) { + if (wp->y_tiled) { + uint32_t extra_lines; + uint_fixed_16_16_t fp_min_disp_buf_needed; + + if (res_lines % wp->y_min_scanlines == 0) + extra_lines = wp->y_min_scanlines; + else + extra_lines = wp->y_min_scanlines * 2 - + res_lines % wp->y_min_scanlines; + + fp_min_disp_buf_needed = mul_u32_fixed16(res_lines + + extra_lines, + wp->plane_blocks_per_line); + min_disp_buf_needed = fixed16_to_u32_round_up( + fp_min_disp_buf_needed); + } else { + min_disp_buf_needed = DIV_ROUND_UP(res_blocks * 11, 10); + } + } else { + min_disp_buf_needed = res_blocks; + } + + if (res_blocks >= ddb_allocation || res_lines > 31 || + min_disp_buf_needed >= ddb_allocation) { *enabled = false; /* -- 2.30.2