From 71fff20ff1bb790f4defe0c880e028581ffab420 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com> Date: Tue, 6 Aug 2013 22:24:03 +0300 Subject: [PATCH] drm/i915: Kill fbc_enable from hsw_lp_wm_results MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit We don't need to store the FBC WM enabled status in each watermark level. We anyway have to reduce it down to a single boolean, so just delay checking the FBC WM limit until we're computing the final value. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> --- drivers/gpu/drm/i915/intel_pm.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index fe1992f2002b..d5f0b4e1f1c4 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2182,7 +2182,6 @@ struct hsw_wm_maximums { struct hsw_lp_wm_result { bool enable; - bool fbc_enable; uint32_t pri_val; uint32_t spr_val; uint32_t cur_val; @@ -2324,13 +2323,6 @@ static bool hsw_compute_lp_wm(struct drm_i915_private *dev_priv, result->fbc_val = max3(res[0].fbc_val, res[1].fbc_val, res[2].fbc_val); result->enable = true; - if (result->fbc_val > max->fbc) { - result->fbc_enable = false; - result->fbc_val = 0; - } else { - result->fbc_enable = true; - } - if (!result->enable) return false; @@ -2575,9 +2567,9 @@ static void hsw_compute_wm_results(struct drm_device *dev, * a WM level. */ results->enable_fbc_wm = true; for (level = 1; level <= max_level; level++) { - if (!lp_results[level - 1].fbc_enable) { + if (!lp_results[level - 1].fbc_val > lp_maximums->fbc) { results->enable_fbc_wm = false; - break; + lp_results[level - 1].fbc_val = 0; } } -- 2.30.2