From a637f9041a164088c03b1a8b2ed0b6e65ad24e0e Mon Sep 17 00:00:00 2001 From: Kevin McKinney Date: Mon, 17 Dec 2012 17:35:19 -0500 Subject: [PATCH] Staging: bcm: Replace B_UINT32 with u32 in target_params.h This patch replace "B_UINT32" with "u32" in target_params.h Signed-off-by: Kevin McKinney Signed-off-by: Greg Kroah-Hartman --- drivers/staging/bcm/target_params.h | 72 ++++++++++++++--------------- 1 file changed, 36 insertions(+), 36 deletions(-) diff --git a/drivers/staging/bcm/target_params.h b/drivers/staging/bcm/target_params.h index 86069cedeecd..e416dac637d4 100644 --- a/drivers/staging/bcm/target_params.h +++ b/drivers/staging/bcm/target_params.h @@ -2,56 +2,56 @@ #define TARGET_PARAMS_H typedef struct _TARGET_PARAMS { - B_UINT32 m_u32CfgVersion; - B_UINT32 m_u32CenterFrequency; - B_UINT32 m_u32BandAScan; - B_UINT32 m_u32BandBScan; - B_UINT32 m_u32BandCScan; - B_UINT32 m_u32ErtpsOptions; - B_UINT32 m_u32PHSEnable; - B_UINT32 m_u32HoEnable; - B_UINT32 m_u32HoReserved1; - B_UINT32 m_u32HoReserved2; - B_UINT32 m_u32MimoEnable; - B_UINT32 m_u32SecurityEnable; - B_UINT32 m_u32PowerSavingModesEnable; /* bit 1: 1 Idlemode enable; bit2: 1 Sleepmode Enable */ + u32 m_u32CfgVersion; + u32 m_u32CenterFrequency; + u32 m_u32BandAScan; + u32 m_u32BandBScan; + u32 m_u32BandCScan; + u32 m_u32ErtpsOptions; + u32 m_u32PHSEnable; + u32 m_u32HoEnable; + u32 m_u32HoReserved1; + u32 m_u32HoReserved2; + u32 m_u32MimoEnable; + u32 m_u32SecurityEnable; + u32 m_u32PowerSavingModesEnable; /* bit 1: 1 Idlemode enable; bit2: 1 Sleepmode Enable */ /* PowerSaving Mode Options: * bit 0 = 1: CPE mode - to keep pcmcia if alive; * bit 1 = 1: CINR reporting in Idlemode Msg * bit 2 = 1: Default PSC Enable in sleepmode */ - B_UINT32 m_u32PowerSavingModeOptions; - B_UINT32 m_u32ArqEnable; + u32 m_u32PowerSavingModeOptions; + u32 m_u32ArqEnable; /* From Version #3, the HARQ section renamed as general */ - B_UINT32 m_u32HarqEnable; - B_UINT32 m_u32EEPROMFlag; + u32 m_u32HarqEnable; + u32 m_u32EEPROMFlag; /* BINARY TYPE - 4th MSByte: Interface Type - 3rd MSByte: Vendor Type - 2nd MSByte * Unused - LSByte */ - B_UINT32 m_u32Customize; - B_UINT32 m_u32ConfigBW; /* In Hz */ - B_UINT32 m_u32ShutDownInitThresholdTimer; - B_UINT32 m_u32RadioParameter; - B_UINT32 m_u32PhyParameter1; - B_UINT32 m_u32PhyParameter2; - B_UINT32 m_u32PhyParameter3; - B_UINT32 m_u32TestOptions; /* in eval mode only; lower 16bits = basic cid for testing; then bit 16 is test cqich,bit 17 test init rang; bit 18 test periodic rang and bit 19 is test harq ack/nack */ - B_UINT32 m_u32MaxMACDataperDLFrame; - B_UINT32 m_u32MaxMACDataperULFrame; - B_UINT32 m_u32Corr2MacFlags; - B_UINT32 HostDrvrConfig1; - B_UINT32 HostDrvrConfig2; - B_UINT32 HostDrvrConfig3; - B_UINT32 HostDrvrConfig4; - B_UINT32 HostDrvrConfig5; - B_UINT32 HostDrvrConfig6; - B_UINT32 m_u32SegmentedPUSCenable; + u32 m_u32Customize; + u32 m_u32ConfigBW; /* In Hz */ + u32 m_u32ShutDownInitThresholdTimer; + u32 m_u32RadioParameter; + u32 m_u32PhyParameter1; + u32 m_u32PhyParameter2; + u32 m_u32PhyParameter3; + u32 m_u32TestOptions; /* in eval mode only; lower 16bits = basic cid for testing; then bit 16 is test cqich,bit 17 test init rang; bit 18 test periodic rang and bit 19 is test harq ack/nack */ + u32 m_u32MaxMACDataperDLFrame; + u32 m_u32MaxMACDataperULFrame; + u32 m_u32Corr2MacFlags; + u32 HostDrvrConfig1; + u32 HostDrvrConfig2; + u32 HostDrvrConfig3; + u32 HostDrvrConfig4; + u32 HostDrvrConfig5; + u32 HostDrvrConfig6; + u32 m_u32SegmentedPUSCenable; /* removed SHUT down related 'unused' params from here to sync 4.x and 5.x CFG files.. * BAMC Related Parameters * Bit 0-15 Band AMC signaling configuration: Bit 1 = 1 – Enable Band AMC signaling. * bit 16-31 Band AMC Data configuration: Bit 16 = 1 – Band AMC 2x3 support. */ - B_UINT32 m_u32BandAMCEnable; + u32 m_u32BandAMCEnable; } stTargetParams, TARGET_PARAMS, *PTARGET_PARAMS, STARGETPARAMS, *PSTARGETPARAMS; #endif -- 2.30.2