From a6573e1f54b713f837ac08d87961f610c63246ba Mon Sep 17 00:00:00 2001 From: Jordan Justen Date: Sun, 6 Mar 2016 23:30:26 -0800 Subject: [PATCH] drm/i915: Add TIMESTAMP to register whitelist MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit This is needed for the Mesa Vulkan driver on Haswell. Signed-off-by: Jordan Justen Cc: Kristian Høgsberg Cc: Kenneth Graunke Reviewed-by: Francisco Jerez Signed-off-by: Daniel Vetter Link: http://patchwork.freedesktop.org/patch/msgid/1457335830-30923-2-git-send-email-jordan.l.justen@intel.com --- drivers/gpu/drm/i915/i915_cmd_parser.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c index 2c50142be559..a5ebe9a13a11 100644 --- a/drivers/gpu/drm/i915/i915_cmd_parser.c +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c @@ -444,6 +444,7 @@ static const struct drm_i915_reg_descriptor gen7_render_regs[] = { REG64(CL_PRIMITIVES_COUNT), REG64(PS_INVOCATION_COUNT), REG64(PS_DEPTH_COUNT), + REG64_IDX(RING_TIMESTAMP, RENDER_RING_BASE), REG32(OACONTROL), /* Only allowed for LRI and SRM. See below. */ REG64(MI_PREDICATE_SRC0), REG64(MI_PREDICATE_SRC1), -- 2.30.2