From a9c8f117f43515572a914e9ec7332906c4e7cdde Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 18 Sep 2015 13:16:30 -0500 Subject: [PATCH] ARM: dts: DRA74x: Add IPC sub-mailbox nodes for all IPUs & DSPs Add the sub-mailbox nodes that are used to communicate between MPU and the remote processors IPU1, IPU2, DSP1 and DSP2. The sub-mailbox nodes utilize the System Mailbox instances 5 and 6. These sub-mailbox nodes are added to match the hard-coded mailbox configuration used within the TI IPC 3.x software package. The Dual-Cortex M4 IPU1 and IPU2 processor sub-systems are assumed to be running in SMP-mode, and hence only a single sub-mailbox node is added for each. All these sub-mailbox nodes are left in disabled state, and should be enabled (and modified if needed) as per the individual product configuration in the corresponding board dts files. Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra74x.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi index feea98e0a4b5..33d11c2c8af3 100644 --- a/arch/arm/boot/dts/dra74x.dtsi +++ b/arch/arm/boot/dts/dra74x.dtsi @@ -93,3 +93,29 @@ <&dss_video2_clk>; clock-names = "fck", "video1_clk", "video2_clk"; }; + +&mailbox5 { + mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { + ti,mbox-tx = <6 2 2>; + ti,mbox-rx = <4 2 2>; + status = "disabled"; + }; + mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { + ti,mbox-tx = <5 2 2>; + ti,mbox-rx = <1 2 2>; + status = "disabled"; + }; +}; + +&mailbox6 { + mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { + ti,mbox-tx = <6 2 2>; + ti,mbox-rx = <4 2 2>; + status = "disabled"; + }; + mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { + ti,mbox-tx = <5 2 2>; + ti,mbox-rx = <1 2 2>; + status = "disabled"; + }; +}; -- 2.30.2