From abbcf0e2a99d55433b2ee44794e6f875fc36aae2 Mon Sep 17 00:00:00 2001 From: Sinan Kaya Date: Tue, 27 Feb 2018 14:14:10 -0600 Subject: [PATCH] PCI: Wait for device to become ready after a power management reset PCIe r4.0, sec 2.3.1, Request Handling Rules, indicates that a device can return CRS Completion Status following a D3hot to D0 transition. Wait until the device becomes ready in that situation. Signed-off-by: Sinan Kaya Signed-off-by: Bjorn Helgaas Reviewed-by: Christoph Hellwig --- drivers/pci/pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 9493b97436c3..a3042e475901 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -4188,7 +4188,7 @@ static int pci_pm_reset(struct pci_dev *dev, int probe) pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr); pci_dev_d3_sleep(dev); - return 0; + return pci_dev_wait(dev, "PM D3->D0", PCIE_RESET_READY_POLL_MS); } void pci_reset_secondary_bus(struct pci_dev *dev) -- 2.30.2