From b3ca42ec8f861922f4e0da8d745811b052252ae3 Mon Sep 17 00:00:00 2001
From: Felix Fietkau <nbd@openwrt.org>
Date: Sun, 18 Jan 2015 20:17:18 +0000
Subject: [PATCH] ralink: correct handle hardware rx 2bytes offset

Signed-off-by: michael lee <igvtee@gmail.com>

SVN-Revision: 44045
---
 .../net/ethernet/ralink/ralink_soc_eth.c      | 25 +++++++++++++------
 .../net/ethernet/ralink/ralink_soc_eth.h      |  4 +++
 .../drivers/net/ethernet/ralink/soc_mt7620.c  |  9 +++----
 3 files changed, 25 insertions(+), 13 deletions(-)

diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
index 28650bbceb..5a681f8e43 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
@@ -41,9 +41,8 @@
 #include "ralink_ethtool.h"
 
 #define	MAX_RX_LENGTH		1536
-#define FE_RX_OFFSET		(NET_SKB_PAD + NET_IP_ALIGN)
-#define FE_RX_HLEN		(FE_RX_OFFSET + VLAN_ETH_HLEN + VLAN_HLEN + \
-		ETH_FCS_LEN)
+#define FE_RX_HLEN		(NET_SKB_PAD + VLAN_ETH_HLEN + VLAN_HLEN + \
+		+ NET_IP_ALIGN + ETH_FCS_LEN)
 #define DMA_DUMMY_DESC		0xffffffff
 #define FE_DEFAULT_MSG_ENABLE    \
         (NETIF_MSG_DRV      | \
@@ -239,7 +238,7 @@ static void fe_clean_rx(struct fe_priv *priv)
 static int fe_alloc_rx(struct fe_priv *priv)
 {
 	struct net_device *netdev = priv->netdev;
-	int i;
+	int i, pad;
 
 	priv->rx_data = kcalloc(NUM_DMA_DESC, sizeof(*priv->rx_data),
 			GFP_KERNEL);
@@ -259,9 +258,13 @@ static int fe_alloc_rx(struct fe_priv *priv)
 	if (!priv->rx_dma)
 		goto no_rx_mem;
 
+	if (priv->flags & FE_FLAG_RX_2B_OFFSET)
+		pad = 0;
+	else
+		pad = NET_IP_ALIGN;
 	for (i = 0; i < NUM_DMA_DESC; i++) {
 		dma_addr_t dma_addr = dma_map_single(&netdev->dev,
-				priv->rx_data[i] + FE_RX_OFFSET,
+				priv->rx_data[i] + NET_SKB_PAD + pad,
 				priv->rx_buf_size,
 				DMA_FROM_DEVICE);
 		if (unlikely(dma_mapping_error(&netdev->dev, dma_addr)))
@@ -752,7 +755,7 @@ static int fe_poll_rx(struct napi_struct *napi, int budget,
 	struct sk_buff *skb;
 	u8 *data, *new_data;
 	struct fe_rx_dma *rxd, trxd;
-	int done = 0;
+	int done = 0, pad;
 	bool rx_vlan = netdev->features & NETIF_F_HW_VLAN_CTAG_RX;
 
 	if (netdev->features & NETIF_F_RXCSUM)
@@ -760,6 +763,10 @@ static int fe_poll_rx(struct napi_struct *napi, int budget,
 	else
 		checksum_bit = 0;
 
+	if (priv->flags & FE_FLAG_RX_2B_OFFSET)
+		pad = 0;
+	else
+		pad = NET_IP_ALIGN;
 	while (done < budget) {
 		unsigned int pktlen;
 		dma_addr_t dma_addr;
@@ -778,7 +785,7 @@ static int fe_poll_rx(struct napi_struct *napi, int budget,
 			goto release_desc;
 		}
 		dma_addr = dma_map_single(&netdev->dev,
-				new_data + FE_RX_OFFSET,
+				new_data + NET_SKB_PAD + pad,
 				priv->rx_buf_size,
 				DMA_FROM_DEVICE);
 		if (unlikely(dma_mapping_error(&netdev->dev, dma_addr))) {
@@ -792,7 +799,7 @@ static int fe_poll_rx(struct napi_struct *napi, int budget,
 			put_page(virt_to_head_page(new_data));
 			goto release_desc;
 		}
-		skb_reserve(skb, FE_RX_OFFSET);
+		skb_reserve(skb, NET_SKB_PAD + NET_IP_ALIGN);
 
 		dma_unmap_single(&netdev->dev, trxd.rxd1,
 				priv->rx_buf_size, DMA_FROM_DEVICE);
@@ -1115,6 +1122,8 @@ static int fe_open(struct net_device *dev)
 	napi_enable(&priv->rx_napi);
 
 	val = FE_TX_WB_DDONE | FE_RX_DMA_EN | FE_TX_DMA_EN;
+	if (priv->flags & FE_FLAG_RX_2B_OFFSET)
+		val |= FE_RX_2B_OFFSET;
 	val |= priv->soc->pdma_glo_cfg;
 	fe_reg_w32(val, FE_REG_PDMA_GLO_CFG);
 
diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h
index b875de9fd4..56bef3453f 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h
@@ -289,6 +289,7 @@ enum fe_work_flag {
 #define FE_PST_DTX_IDX1		BIT(1)
 #define FE_PST_DTX_IDX0		BIT(0)
 
+#define FE_RX_2B_OFFSET		BIT(31)
 #define FE_TX_WB_DDONE		BIT(6)
 #define FE_RX_DMA_BUSY		BIT(3)
 #define FE_TX_DMA_BUSY		BIT(1)
@@ -401,6 +402,9 @@ struct fe_soc_data
 #define FE_FLAG_PADDING_64B		BIT(0)
 #define FE_FLAG_PADDING_BUG		BIT(1)
 #define FE_FLAG_JUMBO_FRAME		BIT(2)
+#define FE_FLAG_RX_2B_OFFSET		BIT(3)
+#define FE_FLAG_RX_SG_DMA		BIT(4)
+#define FE_FLAG_RX_VLAN_CTAG		BIT(5)
 
 #define FE_STAT_REG_DECLARE		\
 	_FE(tx_bytes)			\
diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c
index 6123f24778..05f3708794 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c
@@ -28,7 +28,6 @@
 #define MT7620A_CDMA_CSG_CFG	0x400
 #define MT7620_DMA_VID		(MT7620A_CDMA_CSG_CFG | 0x30)
 #define MT7621_DMA_VID		0xa8
-#define MT7620A_DMA_2B_OFFSET	BIT(31)
 #define MT7620A_RESET_FE	BIT(21)
 #define MT7621_RESET_FE		BIT(6)
 #define MT7620A_RESET_ESW	BIT(23)
@@ -179,7 +178,7 @@ static void mt7620_init_data(struct fe_soc_data *data,
 {
 	struct fe_priv *priv = netdev_priv(netdev);
 
-	priv->flags = FE_FLAG_PADDING_64B;
+	priv->flags = FE_FLAG_PADDING_64B | FE_FLAG_RX_2B_OFFSET;
 	netdev->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
 		NETIF_F_HW_VLAN_CTAG_TX;
 
@@ -193,7 +192,7 @@ static void mt7621_init_data(struct fe_soc_data *data,
 {
 	struct fe_priv *priv = netdev_priv(netdev);
 
-	priv->flags = FE_FLAG_PADDING_64B;
+	priv->flags = FE_FLAG_PADDING_64B | FE_FLAG_RX_2B_OFFSET;
 	netdev->hw_features = NETIF_F_HW_VLAN_CTAG_TX;
 }
 
@@ -220,7 +219,7 @@ static struct fe_soc_data mt7620_data = {
 	.switch_config = mt7620_gsw_config,
 	.port_init = mt7620_port_init,
 	.reg_table = mt7620_reg_table,
-	.pdma_glo_cfg = FE_PDMA_SIZE_16DWORDS | MT7620A_DMA_2B_OFFSET,
+	.pdma_glo_cfg = FE_PDMA_SIZE_16DWORDS,
 	.rx_int = RT5350_RX_DONE_INT,
 	.tx_int = RT5350_TX_DONE_INT,
 	.checksum_bit = MT7620_L4_VALID,
@@ -242,7 +241,7 @@ static struct fe_soc_data mt7621_data = {
 	.switch_init = mt7620_gsw_probe,
 	.switch_config = mt7621_gsw_config,
 	.reg_table = mt7621_reg_table,
-	.pdma_glo_cfg = FE_PDMA_SIZE_16DWORDS | MT7620A_DMA_2B_OFFSET,
+	.pdma_glo_cfg = FE_PDMA_SIZE_16DWORDS,
 	.rx_int = RT5350_RX_DONE_INT,
 	.tx_int = RT5350_TX_DONE_INT,
 	.checksum_bit = MT7621_L4_VALID,
-- 
2.30.2