From cfa32556e58d8a353666fb007f708a4955c6711c Mon Sep 17 00:00:00 2001 From: Junwei Zhang Date: Wed, 21 Sep 2016 10:33:26 +0800 Subject: [PATCH] drm/amd/amdgpu: add info about vram and gtt max allocation size MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Junwei Zhang Reviewed-by: Christian König Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 18 ++++++++++++++++++ include/uapi/drm/amdgpu_drm.h | 8 ++++++++ 2 files changed, 26 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 67b6274e25c8..09b94901faec 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -421,6 +421,24 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file min((size_t)size, sizeof(vram_gtt_total))) ? -EFAULT : 0; } + case AMDGPU_INFO_VRAM_GTT_MAX: { + struct drm_amdgpu_info_vram_gtt_max vram_gtt_max; + u64 max_size; + + max_size = adev->mc.real_vram_size - adev->vram_pin_size; + vram_gtt_max.vram_max_size = max_size * 3 / 4; + + max_size = adev->mc.visible_vram_size - (adev->vram_pin_size - + adev->invisible_pin_size); + vram_gtt_max.vram_cpu_accessible_max_size = max_size * 3 / 4; + + max_size = adev->mc.gtt_size - adev->gart_pin_size; + vram_gtt_max.gtt_max_size = max_size * 3 / 4; + + return copy_to_user(out, &vram_gtt_max, + min((size_t)size, sizeof(vram_gtt_max))) + ? -EFAULT : 0; + } case AMDGPU_INFO_READ_MMR_REG: { unsigned n, alloc_size; uint32_t *regs; diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h index dbfce2035b1f..0db0d66dc2ba 100644 --- a/include/uapi/drm/amdgpu_drm.h +++ b/include/uapi/drm/amdgpu_drm.h @@ -489,6 +489,8 @@ struct drm_amdgpu_cs_chunk_data { #define AMDGPU_INFO_NUM_EVICTIONS 0x18 /* Query the total size of VRAM and GTT domains */ #define AMDGPU_INFO_VRAM_GTT_TOTAL 0x19 +/* Query the max allocation size of VRAM and GTT domains */ +#define AMDGPU_INFO_VRAM_GTT_MAX 0x1a #define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0 #define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff @@ -580,6 +582,12 @@ struct drm_amdgpu_info_vram_gtt_total { __u64 gtt_total_size; }; +struct drm_amdgpu_info_vram_gtt_max { + __u64 vram_max_size; + __u64 vram_cpu_accessible_max_size; + __u64 gtt_max_size; +}; + struct drm_amdgpu_info_firmware { __u32 ver; __u32 feature; -- 2.30.2