From df07bafcd2c79e67a09a724b3d88cea394df8677 Mon Sep 17 00:00:00 2001 From: Christian Lamparter <chunkeey@gmail.com> Date: Sat, 1 May 2021 11:36:10 +0200 Subject: [PATCH] apm821xx: MBL: correct phy-mode delay settings This came up in an upstream commit: " b1dd9bf688b0 "net: phy: broadcom: Fix RGMII delays for BCM50160 and BCM50610M" The PHY driver entry for BCM50160 and BCM50610M calls bcm54xx_config_init() but does not call bcm54xx_config_clock_delay() in order to configuration appropriate clock delays on the PHY, fix that." So the "rgmii" phy-mode has always been wrong, but went unnoticed since the broadcom phy driver didn't push the delay settings to the chip. Signed-off-by: Christian Lamparter <chunkeey@gmail.com> --- target/linux/apm821xx/dts/wd-mybooklive.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/apm821xx/dts/wd-mybooklive.dts b/target/linux/apm821xx/dts/wd-mybooklive.dts index 3fd636cb23..dcb8078050 100644 --- a/target/linux/apm821xx/dts/wd-mybooklive.dts +++ b/target/linux/apm821xx/dts/wd-mybooklive.dts @@ -149,6 +149,7 @@ phy-map = <0x2>; phy-address = <0x1>; phy-handle = <&phy>; + phy-mode = "rgmii-id"; mdio { #address-cells = <1>; -- 2.30.2